Full CPU bus visibility
Routes MOS 6502 socket signals from the target Apple II system into the LogicAnalyzer capture setup.
Socket-level adapter for capturing MOS 6502 CPU signals on Apple II systems. It maps CPU pins to a pair of LogicAnalyzer boards and exposes an additional 16-signal header for wider system correlation.
Routes MOS 6502 socket signals from the target Apple II system into the LogicAnalyzer capture setup.
Pin/channel mapping is designed for two Dr Gusman LogicAnalyzer boards as used in this deployment.
Expansion header allows additional probes beyond CPU pins so you can correlate events across the board.
Designed for Apple IIc and works in Apple IIe. Apple II / II+ operation is possible with additional spacers.
This product does not include the analyzer boards. Two Dr Gusman LogicAnalyzer units are required. You can source boards from direct orders or the PCBWay shared project.
The adapter hardware project is hosted on its official Ositis repository. Capture software comes from Dr Gusman’s LogicAnalyzer project, and this adapter should be used with the 6.5 beta line to import adapter profile/port assignments.
Power down and discharge the system. Confirm CPU orientation and ensure enough vertical clearance for wiring.
Seat the adapter into the CPU socket, then connect both LogicAnalyzer boards according to your signal map.
Use the 16-signal expansion header with fly-wires to observe subsystem signals tied to the event under test.
Install Dr Gusman LogicAnalyzer 6.5 beta and import the adapter profile/port assignment for consistent channels.
Start with a simple boot capture to verify channel polarity, clock stability, and trigger behavior.
Adapter board only; analyzer hardware and optional fly-wire kits are separate purchase items.
No. You need two Dr Gusman LogicAnalyzer boards in addition to this adapter.
Use the 6.5 beta/release line for profile support with this adapter. See linked discussion and project updates.
Yes. It also works on Apple II/II+ with extra spacers; board geometry and slot clearance should be checked first.
Yes, via the extra 16-signal expansion header and fly-wire probing.
You can source them from logicanalyzer.rf.gd or via the PCBWay shared project.